Deployment Performance in Post-Moore-Based HPC Sustainable Platforms

  • Pablo Josue Rojas Yepes Universidad Industrial de Santander – UIS, Bucaramanga, Colombia
  • Carlos Jaime Barrios Hernandez Universidad Industrial de Santander – UIS, Bucaramanga, Colombia
  • Oscar Alberto Carrillo Rozo CITILab, Université de Lyon, CPE, INSA Lyon, Inria
  • Frédéric Le Mouël CITILab, Université de Lyon, CPE, INSA Lyon, Inria
Keywords: sustainability, post-Moore architectures, HPC embedded platforms

Abstract

High-Performance Computing – HPC platforms based in post-Moore architectures integrate multiple specific-purpose chips in heterogenous architectures, focusing on embedded and low-power computational infrastructures – i.e., RISC architecture processors – to improve energy efficiency and low cost. This characteristic allows us to consider a certain search for computing sustainability. Currently, these platforms are very useful to implement from miniclusters to edge/cloud exchange nodes because they present an adequate relationship in terms of performance, scalability, and sustainability in addition to their low cost. This work discusses the performance and sustainability of deploying system operative images and applications in embedded post-Moore architectures addressed to HPC sustainable platforms.

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How to Cite
Rojas Yepes, P. J., Barrios Hernandez, C. J., Carrillo Rozo, O. A., & Le Mouël, F. (2025). Deployment Performance in Post-Moore-Based HPC Sustainable Platforms. Revista Colombiana De Computación, 26(1). https://doi.org/10.29375/25392115.5482

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Published
2025-06-30
Section
Article of scientific and technological research

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